1. Field of the Invention
The present invention relates to a current pulse receiving circuit that coverts an input current pulse to a corresponding logic level voltage pulse and outputs the voltage pulse with an accurate pulse width. More particularly, the invention relates to a current pulse receiving circuit used, in optical communications and similar application fields, after a received light pulse is converted to a corresponding current pulse by a photodetector.
2. Description of the Related Art
Recent developments in the telecommunications field has seen an infrared data communications (IrDA communications) function using infrared rays to connect spaces added to portable terminals, personal computers, and cellular phones. Fiber-optic communications networks are being established to build and expand a telecommunications infrastructure.
In optical communications systems such as those noted above, sunlight, illumination by fluorescent lamps and other lighting devices, and other disturbance light are also applied to a photodiode and other types of photodetectors depending on the brightness of the environment in which the equipment is used. These disturbance lights function to energize the photodetector and allow unwanted DC current components to flow through the current pulse receiving circuit. This makes it necessary to remove these DC current components.
The light pulse signals being transmitted and received are generally burst signals whose pulse width and duty ratio vary. Because of its characteristics, the photodiode PD tends to develop rounding on a rising edge and a falling edge of a current output, resulting at times in tail dragging. Furthermore, it is common, from the viewpoint of removing DC offset components, to use a differentiated waveform which is the result of differentiating the pulse signal, which contributes to tail dragging of the output signal. A region of such tail dragging is more conspicuous when the signal has a wider pulse width, which could cause a comparator circuit or amplifier circuit to malfunction so that it inverts its output state. As a means for producing an output of a logic pulse having an accurate pulse width by preventing this malfunction and maintaining the correct output state, it has been conventional practice to add to an input signal to the comparator circuit or the amplifier circuit a hysteresis voltage or other significant differential voltage. This means also contributes to improved noise resistance.
FIG. 26 shows a current pulse receiving circuit 100 as a first related art. A light pulse is received by a photodiode PD and converted to a current pulse IPD. The current pulse IPD is applied to an input node IN of a current-to-voltage converter circuit 101A, in which it is converted to a corresponding voltage which, in turn, is applied to an inverting input terminal VM2 of an amplifier circuit 102A. Though the figure typically shows a single input terminal for the current-to-voltage converter circuit 101A, the circuit may also be configured as a differential input by using a noninput terminal as a dummy terminal or applying a complementary current pulse. A DC cancellation circuit 105A detects a DC voltage level of an output signal VM2 from the current-to-voltage converter circuit 101A and feeds it back to the input node IN of the current-to-voltage converter circuit 101A, thereby canceling DC disturbance light, such as sunlight and illuminating light, which are to be converted to corresponding current values by the photodiode PD. It sets a time constant sufficiently large with respect to the input light pulse, thereby canceling only the disturbance light components whose input frequencies are less than several kHz. The DC cancellation circuit 105A may be configured as a differential output to coincide with the differential input of the current-to-voltage converter circuit 101A.
The pulse signal converted to a corresponding voltage by the current-to-voltage converter circuit 101A is input to, and amplified by, the amplifier circuit 102A. The amplifier circuit functions to improve response in a comparator circuit 103 at a later stage. A signal is provided from a DC feedback circuit 106 to a reference voltage terminal VP2 of the amplifier circuit 102A. The DC feedback circuit 106 uses an integrating circuit C101, R101, and R102 to integrate a voltage developing at an output terminal VP3 of the amplifier circuit 102A and feeds back the resultant voltage to the reference voltage terminal VP2 of the amplifier circuit 102A, thereby improving an input offset voltage in the amplifier circuit 102A. At the same time, it follows changes in a signal input to the inverting input terminal VM2 with a lag, thus offering a function of adding hysteresis effect between input terminals.
An output from the amplifier circuit 102A is applied to the comparator circuit 103 via the output terminal VP3 and, through a comparison made with a reference voltage VTH coupled to a reference voltage terminal VM3, a positive logic pulse is output. This positive logic pulse is inverted at an inverter circuit 104 and a negative logic pulse is output from an output terminal RX as the output from the current pulse receiving circuit 100.
FIG. 27 shows a current pulse receiving circuit 200 as a second related art. It has the same basic circuit configuration as the current pulse receiving circuit 100 shown in FIG. 26. In the current pulse receiving circuit 200, the output signal from a current-to-voltage converter circuit 101B is subjected to capacitive coupling through capacitive components C102 and C103 to the input terminal of an amplifier circuit 102B, thereby improving the input offset voltage in the amplifier circuit 102B. Therefore, a DC cancellation circuit 105B also has a differential input configuration.
Like the current pulse receiving circuit 100, the DC cancellation circuit 105B functions to cancel DC offset caused by disturbance light. In addition, the input offset voltage in the amplifier circuit 102B is improved through capacitive coupling to the input terminal of the amplifier circuit 102B and, at the same time, a significant differential voltage is added between input signals through the input of a differential signal.
However, due to the tail characteristic of a current output determined by the output characteristics of the photodiode PD and a difference in tail characteristics and others in the differentiated waveform of the pulse signal, in addition to widely varying light pulse widths involved with burst signals in IrDA communications and other optical communications, it is difficult to stably establish a hysteresis voltage width sufficient to prevent erroneous outputs from the comparator circuit 103 even in the tail region of current outputs. That is, the setting value deviates between photodiodes PD that have different tail characteristics in output currents. With the differentiated waveform, too, the tail region varies for different constants of the photodiode PD and differentiating circuit and input signal amplitudes. Moreover, the tail region occurs differently according to the strength of the light pulse received, the clamp level of the current pulse IPD, and other factors. The tail characteristic is thus variable depending on the characteristics of the parts used, circuit constant of the differentiating and other circuits, and operating environment, thus presenting a problem in which it is difficult to stably provide an output with a highly accurate pulse width for a light pulse having a long pulse width.
As an example, FIG. 28 shows input and output waveforms of response of the comparator circuit 103 in the-first related art. In this case, the amplifier circuit 102A provides a single output supplied to the noninverting input terminal VP3 and a signal having a predetermined hysteresis voltage width with respect to the reference voltage VTH is supplied to the reference voltage terminal VM3. A shorter current pulse IPD with respect to the predetermined hysteresis voltage width provides an output signal RX with a highly accurate pulse width. With a longer current pulse IPD, however, the input signal VP3 applied to the comparator circuit 103 as a differentiated waveform drags its tail. This causes the input relation of the comparator circuit 103 to be inverted in the middle of the input current pulse IPD width, thus inverting the output signal RX. FIG. 29 shows input and output waveforms of response of the comparator circuit 103 in the second related art. In this case, the output from the amplifier circuit 102B is a differential output, being supplied to each of the input terminals VP3 and VM3. Because it is a differential signal, the output signal RX with a highly accurate pulse width is provided with a short current pulse IPD. Since the differential signal is a differentiated waveform that drags its tail, however, the input relation of the comparator circuit 103 is inverted in the middle of the input current pulse IPD width with a longer current pulse IPD, thus inverting the output signal RX.
When adding a predetermined hysteresis voltage width to the reference voltage VTH for a single input signal as that shown in FIG. 28, an improvement can be made if the hysteresis voltage width is set large. If the hysteresis voltage width is set to a level larger than the amplitude of a small input signal, however, the set hysteresis voltage can no longer be reset, causing the output terminal RX to be locked in the set position. This presents a problem.
If the intensity of an input light pulse is high, the output voltage amplitude is clamped at the current-to-voltage converter circuits 101A and 101B. For this clamping operation, it is common to use a forward voltage of a junction in a bipolar transistor or a diode and it is therefore impossible to set the output voltage amplitude during the clamping operation to a level lower than the forward voltage of the junction. As a result, the difference from the output voltage amplitude under low intensity becomes too large, which makes the tail waveform due to photodiode PD characteristics at the trailing edge of the pulse under high intensity prominent as compared with that under a low intensity. This disables accurate detection of the trailing edge of the pulse under high intensity, causing the pulse width at the output terminal RX to be wider than it actually is.
As specific examples, FIG. 30 shows a response waveform of the amplifier circuit 102A according to the first related art, while FIG. 32 shows a response waveform of the amplifier circuit 102B according to the second related art. In both cases, a tail waveform arising from the photodiode PD output characteristics is noticeable at the trailing edge of the pulse waveform VM2, which causes the point of intersection with the reference voltage VP2 (in FIG. 30) or the complementary voltage VP2 (in FIG. 32) to lag with respect to the actual trailing edge of the light pulse, thus making the pulse width at the output terminal RX large.
Furthermore, if the intensity of the input light pulse is low, the input light pulse is not subjected to a clamping operation, letting the output characteristics of the photodiode PD be output as they are. This makes the tail waveform prominent both at the leading edge and the trailing edge of the pulse. Since the voltage difference between input signals at the leading edge of the pulse is in a direction in which there is greater potential difference, however, there is no response lag at the leading edge of the pulse at the output terminal RX. At the trailing edge of the pulse, however, the tail waveform acts to retard the intersection of input signals. Therefore, as in the case of high intensity it is not possible to accurately detect the trailing edge of the pulse, thus making the pulse width at the output terminal RX larger than it actually is.
As examples, FIG. 31 shows a response waveform of the amplifier circuit 102A according to the first related art, while FIG. 33 shows a response waveform of the amplifier circuit 102B according to the second related art. In both cases, the tail waveform arising from the photodiode PD output characteristics at the trailing edge of the pulse waveform VM2 causes the point of intersection with the reference voltage VP2 (in FIG. 31) or the complementary voltage VP2 (in FIG. 33) to lag with respect to the actual trailing edge of the light pulse, thus making the pulse width at the output terminal RX large.
In optical communications including the IrDA communications covering also the infrared region, the light pulse signals transmitted and received are generally burst signals with varying pulse widths and duty ratios. Furthermore, the intensity of the light being transmitted varies greatly depending on the transmission distance and transmission environment of the light pulse signals. A problem therefore exists in which an accurate pulse width cannot be output with varying pulse widths and varying light intensities as noted above.